基于DDS的PCM数字信号源设计与实现*

谢秀峰; 苏淑靖; 侯利民

谢秀峰,苏淑靖,侯利民.基于DDS的PCM数字信号源设计与实现*[J].电测与仪表,2015,52(8):.
XIE Xiufeng,SU Shu-jing,HOU Li-min.Design of The PCM Digital Signal Source Based on DDS[J].Electrical Measurement & Instrumentation,2015,52(8):.

Design of The PCM Digital Signal Source Based on DDS

DOI：

中文关键词: FPGA 数字频率合成连续可调信号源

英文关键词:FPGA digital frequency synthesis adjustable signal source

基金项目:国家自然科学(51075375)

作者中文名	作者英文名	单位
谢秀峰	XIE Xiufeng	中北大学电子测试技术国家重点实验室
苏淑靖	SU Shu-jing	中北大学电子测试技术国家重点实验室
侯利民	HOU Li-min	中北大学电子测试技术国家重点实验室

摘要点击次数: 1809

中文摘要:

针对传统的数字信号源存在码速率单一不灵活可调的缺点,设计了基于FPGA的码速率连续可调PCM数字信号源。该设计采用数字频率合成技术DDS,提供频率连续可调的时钟信号,使输出数字信号码速率在1bps～10Mbps连续可调,可实现速度快,步进小,频率分辨率高的调控。实验表明,该信号源可实现输出PCM数字信号,输出信号的码速率可以由用户根据实际需求利用上位机软件设定。

英文摘要:

Aiming at the shortcomings of single and no adjustable code rate of traditional telemetry digital signal source, an adjustable code rate telemetry PCM digital signal source based on FPGA was designed. The method uses the technology of digital frequency synthesis DDS to provide the continuously adjustable clock signal, and the code rate of signals can be adjust between 1bps～10Mbps, it can realize regulation with characteristics of speed, small step and high resolution. Experimental results showed that the signal source could output PCM digital signals, and the code rate of signals can be set though the PC software by the users.

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