Aiming at the problems of insufficient phase locking accuracy of traditional software phase-locked loops (PLL) under complex conditions such as grid voltage imbalance and harmonic pollution, a new software phase-locked loop design method is proposed. The basic principle of traditional PLL, and influence of power grid frequency, PLL output frequency and phase difference on PLL performance is analyzed in this paper. By applying a complex coefficient filtering (CCF) link in the two-phase stationary reference frame to suppress the influence of the higher harmonics and negative sequence component of the power grid, the cascaded delay signal cancellation (CDSC) method is used to filter out the lower specified harmonics. The simulation results show that the proposed phase-locked loop has good dynamic characteristics and phase-locked accuracy, and can quickly and accurately complete the phase-locked loop under complex conditions such as unbalanced voltage and harmonic pollution.