针对传统基于二阶广义积分器的锁频环（second-order generalized integrator based frequency locked-loop，SOGI-FLL）抗直流干扰能力不足的问题，本文提出一种能够抑制直流偏移的改进型SOGI-FLL设计方案。首先，简要介绍了SOGI-FLL的结构，并量化分析了输入信号中直流分量对SOGI-FLL的锁频输出信号和正交信号对中β轴分量的影响。通过新增一条低通滤波通道，对SOGI-FLL进行结构改进，并结合数学理论分析和频率特性分析，证明了该改进方案的有效性。最后，利用PSCAD仿真软件，在含直流分量的电网环境下，通过设置多组SOGI-FLL和ESOGI-FLL的对比实验验证了本文所设计方案的正确性。
英文摘要:
Aiming at the traditional second-order generalized integrator based frequency locked-loop has insufficient anti-DC interference ability, an improved SOGI-FLL design scheme considering DC offset suppression is proposed. Firstly, the structure of SOGI-FLL is introduced, then the effects of input signal’s DC component on the SOGI-FLL’s frequency locking output signal and the orthogonal signal on the mid-beta axis component are analyzed. The structure of SOGI-FLL is improved by adding a new low-pass filter channel. Then The effectiveness of the improved scheme is proved by mathematical analysis and frequency analysis. Finally, using PSCAD simulation software, in the grid with DC component, the correctness of the design scheme is verified by setting up groups of SOGI-FLL and ESOGI-FLL comparative experiments.